CHERI Enabled Products

The CHERI Enabled directory records products certified under the Alliance programme. Each entry identifies a particular product and version and publishes the applicant’s answers about its CHERI implementation.

The current directory includes two processor intellectual-property products: processor designs that can be licensed for integration into chips. Both were certified under version 1.0 of the programme. They address different parts of the processor market and illustrate that CHERI is available for both constrained embedded systems and 64-bit application processing.

cheriot-ibex 1.0

Microsoft’s cheriot-ibex is a 32-bit RISC-V microcontroller core implementing the CHERIoT 1.0 instruction-set architecture. It is designed for embedded systems and does not include the hybrid mode found on some other CHERI platforms.

The product was certified on 26 March 2026. The CHERIoT certification record covers its architecture, formal verification, test approach, tag protection, temporal-safety model, debug assumptions, and excluded non-CHERI configuration.

Its fit is in constrained devices that need small software compartments and memory protection without relying on a conventional memory-management unit.

X730-MP4-Lux 1.0

Codasip’s X730-MP4-Lux is a commercially licensable 64-bit application-processor core implementing CHERI-RISC-V. It targets systems that need an application-class processor and a path for both conventional and capability-aware software.

The product was certified on 26 March 2026. The X730 certification record describes its supported modes, hardware verification, memory-access paths, temporal-safety support, debug model, and integration assumptions.

Its fit is in larger system-on-chip designs that require richer operating-system support, virtual memory, and the ability to protect substantial existing software stacks.

What certification covers

Both entries are processor intellectual property. Certification records the named core and programme criteria; it does not automatically extend to:

• a system-on-chip that integrates the core;
• memory, devices, or direct-memory-access engines around it;
• a development board or final hardware product;
• an operating system, runtime, or application;
• the configuration and lifecycle of a deployed system.

Those layers determine how much of the architectural protection reaches the complete product.

Why the public records matter

The records provide more information than the presence of a logo. Architecture versions, execution modes, verification, privileged paths, temporal-safety mechanisms, software support, and limitations all influence whether a processor fits a particular use.

The programme and product list can change as new applications are approved or existing certifications are reviewed. This directory is the Alliance’s record of current CHERI Enabled products and will be updated when that status changes.