CHERI Blossoms Conference 2026

A three-day Cambridge programme of tutorials, ecosystem updates, and technical talks for people researching, building, and adopting CHERI.

Pre-Conference Tutorial: 25 March 2026

Main Conference Date: 26 – 27 March 2026

Location: Department of Computer Science and Technology – William Gates Building, University of Cambridge, Cambridge, UK

Thank you to all who attended!

You can find details about CHERI Blossoms 2027 here.

Recordings & Slides

Speakers

Exhibitors

Conference Overview

The CHERI Blossoms Conference 2026 was the must-attend event for forward-thinking decision-makers and innovators! This exclusive gathering was tailored for industry leaders, business strategists, product managers, researchers and technologists, who are poised to influence the future of digital security by design.

At this premier event, participants had the unique opportunity to engage with top experts and gain firsthand insights into the latest developments using CHERI (Capability Hardware Enhanced RISC Instructions) technology. Participants discovered how these cutting-edge advancements are revolutionizing the creation of resilient, secure systems and learn how integrating these innovations can provide a competitive edge for your organization.

Over 100 people attended the livestream via Zoom.

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC hosted a hands-on tutorial the day before CHERI Blossoms 2026. Designed for students, researchers, and developers, the session covered CHERI and CHERIoT, memory safety, compartmentalisation, and related hardware-software stacks, with presentations, code examples, and guided exercises.

Watch video

Pre-Conference Tutorial: Hands-on Introduction to CHERI and CHERIoT

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC co-organised a comprehensive tutorial on CHERI alongside the conference.

The agenda for the tutorial can be found on the tutorial webpage.

CHERI tutorial showing a demonstration in a classroom

Agenda

The main conference ran over two consecutive days (Thursday and Friday), with the exhibition space open throughout.

Each day of the conference had a distinct focus:

Pre-Conference Tutorial (Wednesday 25th March 2026)

Main Conference – Day 1 (Thursday 26th March 2026)

  • Keynotes and general / business-focused sessions
  • CHERI Project 15th Birthday Party (including a light dinner)

Main Conference – Day 2 (Friday 27th March 2026)

  • Technical sessions

Recordings & Slides

Talk Title Author Organisation Video Slides Speaker
CHERI crash course - high-level introduction Robert Watson University of Cambridge Video Slides Speaker
Keynote – CHERI: quantifying the value of a strategic imperative Ollie Whitehouse National Cyber Security Centre Video Slides Speaker
Featured Message Kathleen Fisher ARIA Video - Speaker
Keynote – Memory Safety at Scale: An Industry Perspective Alex Rebert Google Video Slides Speaker
Keynote – Getting ready for the CRA: from compliance to confidence Maika Föhrenbach European Commission (DG CONNECT) - Slides Speaker
DSIT message Bradley Finn DSIT Video Slides Speaker
UKRI message John Goodacre UKRI Video - Speaker
Progress of the Alliance Mike Eftimakis CHERI Alliance Video Slides Speaker
CHERI Research Centre Robert Watson CHERI Research Centre Video Slides Speaker
The Capable Hub: Our Recent Work and Next Steps Andrew Murray The Capable Hub Video Slides Speaker
CHERI Adoption study Adam Finney CHERI Alliance - Slides Speaker
Accelerating commercial adoption of CHERI Manu Ravishankar PA Consulting Video Slides Speaker
A new analysis of CVE vulnerabilities : trends, changes and CHERI Carl Shaw Codasip Video Slides Speaker
CHERI Mocha: an open-source memory-safe application system Javier Orensanz Martinez lowRISC Video Slides Speaker
BT business keynote Dave Harcourt BT Video - Speaker
ETSI Standardisation status Paul Waller NCSC Video - Speaker
RISC-V: Driving the Future of Open Compute Andy Moore RISC-V International Video Slides Speaker
CHERI RISC-V Standardisation Status Tariq Kurd Codasip - Slides Speaker
BT’s Engagement with CHERI Technology Sam Cater BT Video Slides Speaker
Inside the CHERI in SoC Working Group Ben Fletcher CHERI Alliance Video Slides Speaker
MMU-based revocation for temporal safety on CHERI application cores Tariq Kurd / Alfredo Mazzinghi Codasip / Capabilities Limited Video Slides Speaker
COSMIC verification: comprehensive, end-to-end formal proofs of CVA6-CHERI Louis-Emile Ploix / Marno van der Maas lowRISC CIC Video Slides Speaker
CHERI is being standardised, so why do we still need to do research? Simon Moore University of Cambridge Video Slides Speaker
Lightning talk - CHERIoT-Kudu David Chisnall SCI Semiconductor Video Slides Speaker
Lightning talk - Portable CHERI OS APIs Paul Metzger University of Cambridge - Slides Speaker
Lightning talk - CHERI-PIT: Port Integrity Tool David Musliner SIFT Video Slides Speaker
Lightning talk - CHERI-Zephyr Jennifer Jackson University of Birmingham Video Slides Speaker
Lightning talk - Microservice Store Murat Cakmak Microservice Store Video Slides Speaker
Performance Progress of CVA6-CHERI Jonathan Woodruff Capabilities Limited Video Slides Speaker
CHERI performance improvement update Carl Shaw Codasip Video Slides Speaker
Securing Real-Time Communication: Porting and running Edge Computing for mission critical services on Morello CHERI Peter Cox / Alexander Voevoda UM Labs Video Slides Speaker
Rust on CHERIoT Edoardo Marangoni SCI Semiconductor Video Slides Speaker
CHERI Linking through the Ages John Baldwin / Jessica Clarke Ararat River Consulting, LLC / University of Cambridge Video Slides Speaker
Verifying Secure Memory Compartmentalization in CHERI Processors at the RTL Johannes Müller RPTU Kaiserslautern-Landau Video Slides Speaker
CHERI-enabled RISC-V VP: Capabilities and Applications Luca Müller German Research Center for Artificial Intelligence (DFKI) Video Slides Speaker
PICASSO: Scaling CHERI Use-After-Free Protection to Millions of Allocations Merve Gülmez / Thomas Nyman Ericsson Video Slides Speaker
Towards Heterogeneous CHERI Compartmentalization Jianyi Cheng University of Edinburgh Video Slides Speaker
All-Caps — Extending Capabilities Across the Whole SoC Samuel Stark University of Cambridge Video Slides Speaker

Exhibitors

Cantech Informatics logo

Capabilities Limited logo

CHERI logo

CHERI Research Centre logo

Codasip logo

lowRISC logo

Novomorphic logo

Parvat logo

SCI Semiconductor logo

Sensor IT logo

UM Labs logo

Wyvern Global logo

Venue

CHERI Blossoms 2026 was held in Cambridge UK, at the Department of Computer Science and Technology in the William Gates Building, on the University of Cambridge’s West Cambridge site, located off Madingley Road.

Address

William Gates Building

15 JJ Thomson Ave

Cambridge CB3 0FD

William Gates building - Outside view

CHERI Blossoms 2026 Robert Watson giving a talk

CHERI Blossoms 2026 exhibition

View map

Speakers

Keynote Speakers

Google

Alex Rebert

Alex Rebert is an engineer at Google, where he focuses on memory safety. Previously, he co-founded ForAllSecure and led the creation of Mayhem, the autonomous cyber re...

ARIA

Kathleen Fisher

Kathleen Fisher has been instrumental in bringing CHERI from research into national programmes. A long‑standing leader in secure systems and programming languages, she...

European Commission (DG CONNECT)

Maika Föhrenbach

Maika Föhrenbach connects CHERI to Europe’s regulatory future. She leads product security and certification policy at the European Commission and coordinates implement...

National Cyber Security Centre

Ollie Whitehouse

Ollie is a fellow of the Royal Academy of Engineering whose career in cyber security spans over 30 years. Today he serves as the Chief Technical Officer for the Nation...

BT

Sam Cater

Sam is a Research Technical Manager within BT’s Research and Commercialisation department, focussing on Cybersecurity technologies. Throughout his career, he has held ...

Featured Speakers

CHERI Alliance

Adam Finney

Adam Finney is a CHERI technologist with over 20 years of systems experience, and a key driver of CHERI adoption. As Lead of the Adoption Programme and Marketing Worki...

UM Labs

Alexander Voyevoda

Alex Voyevoda is a senior systems engineer focused on turning high‑assurance ideas into production systems. With over 30 years of experience in low‑level C systems on ...

Capabilities Limited

Alfredo Mazzinghi

Alfredo is a Research Assistant at University of Cambridge and Research Engineer at Capabilities Limited. Their main research interest is on memory safety in operating...

The Good Penguin

Andrew Murray

Andrew Murray is founder and director of The Good Penguin, a UK based consultancy with a focus and passion for embedded Linux, low level and open-source software. The ...

RISC-V International

Andy Moore

Andy Moore drives awareness and adoption of RISC‑V across its global member ecosystem. As Director of Marketing at RISC‑V International, and with deep prior experience...

Codasip

Ben Fletcher

Ben Fletcher has been involved in SoC development for over 25 years. He has worked in design, verification, software, and more recently Architecture. He has worked for...

DSIT

Bradley Finn

Bradley Finn is Head of Cyber Innovation Policy at the UK’s Department for Science, Innovation and Technology. He is responsible for polices and programmes to support ...

Codasip

Carl Shaw

Carl Shaw is a hands-on technical expert with a diverse background in embedded systems and security engineering. His work focuses on the intersection of hardware and s...

BT

Dave Harcourt

Dave Harcourt is the CISO for BT International and a BT Fellow, with decades of experience shaping cyber security at scale. He sets security strategy for BT and influe...

SCI Semiconductor

David Chisnall

David Chisnall has been working on CHERI since 2012, when he joined the University of Cambridge to lead the languages and compiler work on the CHERI project. He joined...

Smart Information Flow Technologies (SIFT)

David Musliner

Dr. David Musliner is a Senior Research Fellow at Smart Information Flow Technologies (SIFT).

SCI Semiconductor

Edoardo Marangoni

Edoardo has been working with compilers for the majority of his professional career. After working in the Wasm space, he joined SCI Semiconductor and started working o...

lowRISC

Javier Orensanz Martinez

Javier is a business leader with over 25 years of experience in the semiconductors industry. He was the general manager of Arm’s tools business unit for 8 years, and i...

University of Birmingham

Jennifer Jackson

Jennifer is an Electronic Engineer with experience in FPGA design, Arm v8.2, computer security, capability architectures, CHERI, LLVM tool chain, RISC-V development an...

University of Cambridge

Jessica Clarke

Jessica Clarke is a Senior Research Software Engineer at the University of Cambridge, contributing to the maintenance and development of CHERI LLVM and CheriBSD, and h...

University of Edinburgh

Jianyi Cheng

Jianyi Cheng is an Assistant Professor in the School of Informatics at the University of Edinburgh. His research aims to automatically produce small, fast, low-energy,...

RPTU Kaiserslautern-Landau

Johannes Müller

Johannes Müller received his Dipl.-Ing. degree in Electrical and Computer Engineering from the Technische Universität Kaiserslautern in 2018. He is currently a Ph.D. c...

Ararat River Consulting, LLC

John Baldwin

John Baldwin has been an active FreeBSD developer for over 25 years working on a broad range of subsystems in the kernel and bits of userspace. John has also contribut...

UKRI

John Goodacre

Prof. John Goodacre: University of Manchester, Director Digital Security by Design: UKRIJohn is Professor of Computer Architectures at the Department of Computer Scien...

Capabilities Limited

Jonathan Woodruff

Dr Jonathan Woodruff is a Senior Research Associate with expertise in processor architecture and microarchitecture as well as low-level software optimisation. Speciali...

lowRISC

Louis-Emile Ploix

Louis-Emile is a current undergraduate at the University of Oxford, and a formal verification engineer for lowRISC working on the COSMIC project.

German Research Center for Artificial Intelligence (DFKI)

Luca Müller

Luca Müller received the M.Sc. degree in computer science from University of Bremen in 2025. He is currently a Researcher in the Cyber-Physical Systems Group at the Ge...

lowRISC

Marno van der Maas

Dr Marno van der Maas completed a PhD at the University of Cambridge in 2022 on protecting trusted execution environments from side-channel attacks. During this time, ...

PA Consulting

Manu Ravishankar

Manu Ravishankar is a Principal Consultant specialising in innovation strategy, programme design and technology commercialisation. Formerly Head of Insights and Impact...

Ericsson

Merve Gülmez

Merve Gülmez is a researcher at Ericsson Security Research. She holds a PhD in Computer Science from KU Leuven, and her research focuses on systems security, memory sa...

CHERI Alliance

Mike Eftimakis

Mike Eftimakis has an extensive background in the semiconductor and electronics industry with 30 years in senior technical and business roles. He has a rich history of...

Microservice Store

Murat Cakmak

Murat is Co-CEO @ Microservice Store.

University of Cambridge

Paul Metzger

Dr Paul Metzger is a Research Associate in the Department of Computer Science and Technology at the University of Cambridge. He recently started working on CHERI OS AP...

UM Labs

Peter Cox

Peter Cox is the CEO and founder of UM Labs, a UK R&D company specialising in cybersecurity for real-time application on IP networks. Peter has over 30 years’ experien...

CHERI Alliance, University of Cambridge

Robert Watson

Professor Robert N. M. Watson is a Professor of Systems, Security, and Architecture at the University of Cambridge’s Department of Computer Science and Technology. His...

University of Cambridge

Samuel Stark

Samuel W. Stark is a final-year PhD student at the University of Cambridge, studying alternate capabilty systems under Simon W. Moore, with a published article on the ...

University of Cambridge

Simon Moore

Professor Simon Moore is Professor of Computer Engineering at the University of Cambridge, where he leads research in computer architecture with a focus on secure and ...

Codasip

Tariq Kurd

Tariq Kurd has been involved in CPU architecture, design, and verification for over 25 years, primarily in the embedded field. He has worked on VLIW, multithreading, o...

Ericsson

Thomas Nyman

Thomas Nyman holds a position as Expert in Trusted Hardware & Software Technologies at the telecommunications company Ericsson where he works with software and platfor...