CHERI technology, from research to implementation
CHERITech'25 brought the CHERI technical community together in Manchester to share the latest developments across CHERI hardware, software, tools and real-world implementations.
Organised by the CHERI Alliance, the conference combined technical talks with demonstrations, posters, exhibition and networking, giving attendees the opportunity to learn from the people building CHERI technology and exchange experience across the growing ecosystem. The event plan specifically included talks, exhibition, posters and networking as core elements of the conference.
Watch the CHERITech'25 event overview
Across the CHERI stack
The programme explored CHERI from processor architecture through to software and applications.
Topics included CHERI-RISC-V standardisation, open-source CHERI processor implementations, performance, CHERIoT, virtual machines, secure compartmentalisation and hardware-software co-design, alongside practical applications of CHERI technology.
Alongside the conference programme, the exhibition and poster area gave participants the opportunity to explore ongoing CHERI work and meet organisations building technology across the ecosystem.
Demonstrations
| Demo | Organisation | Video |
|---|---|---|
| Commercial CHERI RISC-V Processors Demo | Codasip | ▶️ |
| CHERI Demos | lowRISC | ▶️ |
Exhibitors
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Venue
CHERITech’25 was held in Manchester, UK at the Sister – Renold Innovation Hub.
Address
Sister – Renold Building
32a Altrincham St
Manchester
M1 7JR
Programme
Welcome & Innovate UK Competition Results | CHERITech’25
Welcome / UKRI presentation
Programme organisation credit: UKRI, University of Manchester
Progress of the Alliance
Programme organisation credit: CHERI Alliance
Poster Highlights
Posters pitch
Programme organisation credit: CHERI Alliance
An open-source RV64Y implementation for commercialization | CHERITech’25
Programme organisation credit: Capabilities Limited, University of Cambridge
Announcing COSMIC
Programme organisation credit: lowRISC
CHERI Performance
Programme organisation credit: Codasip
Sonata®: A platform for high-integrity operational technology
Programme organisation credit: lowRISC
BLACKOUT: Data-Oblivious Computation with Blinded Capabilities
Programme organisation credit: Ericsson
Progress of CHERI
Programme organisation credit: Capabilities Limited, University of Cambridge
CHERIoT Audit
Programme organisation credit: SCI Semiconductor
Rigorous Hardware-Software Codesign for Secure Compartmentalization on Embedded Devices
Programme organisation credit: Google
CHERI-RISC-V standardisation status
Programme organisation credit: Codasip
Redesigning Thread Local Storage For CHERI
Programme organisation credit: University of Cambridge
Introducing a development Hub
Programme organisation credit: The Good Penguin
Capability-Based Isolation for UAV Software Stacks: Porting PX4/NuttX to CHERI
Programme organisation credit: Minerva Systems, University of Modena and Reggio Emilia
Failure-Oblivious CHERI
Programme organisation credit: University of Cambridge
Industrializing CHERI for Safety-Critical Real-Time and Virtualized Systems: Capability Support in Hypervisor and VxWorks RTOS
Programme organisation credit: Wind River
State of the Union: Which Virtual Machines can I run on CHERI?
Programme organisation credit: University of Glasgow
