Event Overview
This full-day hands-on tutorial introduced students, researchers and software developers to CHERI and CHERIoT through presentations, code examples, guided exercises and practical experimentation with CHERI-enabled hardware and software platforms.
Held alongside the CHERI Blossoms 2026 conference, the tutorial was co-organised by the CHERI Research Centre at University of Cambridge, Codasip, and lowRISC.
Participants explored memory safety, compartmentalisation and different parts of the CHERI hardware-software ecosystem, progressing from the fundamentals of CHERI to practical experimentation with CheriBSD/Morello, CHERI-RISC-V and CHERI Linux, and CHERIoT. The tutorial provided a practical starting point for anyone interested in understanding CHERI and beginning to experiment with the technology.
What participants explored
The tutorial provided a practical starting point to get to know what the CHERI technology is, what research areas are related to it, and how to get started experimenting with CHERI-extended hardware-software stacks.
CHERI fundamentals
An introduction to CHERI, memory safety and compartmentalisation, followed by hands-on software experimentation using CheriBSD and Morello.
CHERI-RISC-V and Linux
Practical exploration of CHERI-RISC-V, the Codasip X730 and CHERI Linux, connecting the CHERI architecture with an application-class processor and operating system environment.
CHERIoT
An introduction to CHERIoT, lowRISC's Sonata FPGA platform and the CHERIoT RTOS, exploring CHERI concepts in an embedded environment.
Continue learning
For background on the concepts explored during the tutorial, participants were recommended to read “CHERI: Hardware-Enabled C/C++ Memory Protection at Scale”, published in the IEEE Security & Privacy magazine.
Venue
The Hands-on Introduction to CHERI and CHERIoT was held in Cambridge UK, at the Department of Computer Science and Technology in the William Gates Building, on the University of Cambridge’s West Cambridge site, located off Madingley Road.
